In-Memory Computing Hardware Accelerators for Data-Intensive Applications by Baker Mohammad & Yasmin Halawani

Author:Baker Mohammad & Yasmin Halawani [Mohammad, Baker & Halawani, Yasmin]
Language: eng
Format: epub
Tags: Technology & Engineering, Electronics, Circuits, General, Computers, Computer Architecture, Electrical
ISBN: 9783031342332
Google: YjfZEAAAQBAJ
Publisher: Springer Nature
Published: 2023-09-24T23:00:00+00:00

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If the crossbar height is smaller than the number of bits required for each neuron (thermometer code length times the number of input neurons) multiple iterations of the crossbar are required. At each iteration, partially accumulated sums for W output neurons are obtained, where W is the width of the crossbar array. After the analog output of the spiking neuron is obtained and converted to a digital value, a digital circuit implements the functionality of the spiking neuron, which is translated into an addition of the accumulated input of each neuron and a multiplication by the leakage constant (leaky integrate neuron).

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